Commit graph

17 commits

Author SHA1 Message Date
Ondrej Holecek
5effc83479 update FSF addresses to FSF web page
FSF addresses used in PA sources are no longer valid and rpmlint
generates numerous warnings during packaging because of this.
This patch changes all FSF addresses to FSF web page according to
the GPL how-to: https://www.gnu.org/licenses/gpl-howto.en.html

Done automatically by sed-ing through sources.
2015-01-14 22:20:40 +02:00
Felipe Sateler
13a3daa928 Fix #defines for Debian GNU/kFreeBSD
Because debian does not run with the freebsd libc, but rather uses the
GNU one, it chose to not define __FreeBSD__, but rather __FreeBSD_kernel__.
Use the alternative when the functionality tested is for kernel
features, and keep the __FreeBSD__ one when using freebsd libc
headers.

If this patch is applied, debian could drop all the current patches when
importing 6.0 :)
2014-12-01 12:11:07 +01:00
Peter Meerwald
6d9891e8b9 sconv: Use optimized conversion function for both directions
for example, the conversion function for
convert_from_float32ne(PA_SAMPLE_S16LE) can also be used for
convert_to_s16ne(PA_SAMPLE_FLOAT32LE)

v2: ARM can potentially be big- or little endian; only apply
optimization on LE based on WORDS_BIGENDIAN #define (thanks, Tanu)

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
2014-08-10 11:59:28 +03:00
Koop Mast
b0a04d8031 sconv, svolume: Fix compilation on 32-bit FreeBSD
Don't try to compile this code on 32-bit FreeBSD, it will error out complain
about registers only being available in 64-bit mode.
2014-02-22 13:06:29 +02:00
Peter Meerwald
e66e846418 sconv: Change/fix conversion to/from float32
use (1<<15) instead of 0x7fff as a factor when converting from s16 to float32
use (1<<31) instead of 0x7fffffff as a factor when converting from s32 to float32

the change is motivated by the following desireable properties:
* s16_from_f32(f32_from_s16(x)) == x for all possible s16 values
* x / (1.0f << 15) == x * (1.0f / (1 << 15)) for all x in s16

above changes enable easier optimization while guaranteeing bit-exact results

further, other audio sample conversion code (libavresample) does it the same way

v3 (comments Tanu):
* fix saturation in pa_sconv_s16le_from_f32ne_neon(), use vqrshrn
v2 (comments Tanu):
* fix comments in ARM NEON code
* use llrintf() in pa_sconv_s32le_from_float32ne()

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
Cc: Tanu Kaskinen <tanuk@iki.fi>
2013-02-04 12:07:14 +02:00
Peter Meerwald
db41a4832d sconv: Check for SSE flag before initializing code
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
2013-02-01 09:10:44 +02:00
Deng Zhengrong
c8cd89a7cb tests: add cpu test
It tests only x86 architecture right now.
2012-08-04 08:23:34 +02:00
Peter Meerwald
c6e6d682ed sconv: Fix generation of floats in SSE test code
the random floats x should be zero-mean with -(1+eps)<x<(1+eps) for some
small epsilon; previously only negative x were generated
2012-01-11 22:11:24 +05:30
Paul Menzel
dd32032062 svolume_{mmx, sse}, sconv_sse: Fix compilation errors with X32 toolchain
From d8b81d5393df36085009bf9f69d41fa85e2ae58a Mon Sep 17 00:00:00 2001
From: Nitin A Kamble <nitin.a.kamble@intel.com>
Date: Sat, 10 Dec 2011 09:09:06 +0100

Make assembly syntax compatible to the X32 toolchain and fix the
following kind of compilations errors with X32 gcc.

| pulsecore/svolume_mmx.c: Assembler messages:
| pulsecore/svolume_mmx.c:107: Error: `(%esi,%rdi,4)' is not a valid base/index expression
| pulsecore/svolume_mmx.c:135: Error: `(%esi,%rdi,4)' is not a valid base/index expression
| pulsecore/svolume_mmx.c:161: Error: `(%esi,%rdi,4)' is not a valid base/index expression
| pulsecore/svolume_mmx.c:162: Error: `8(%esi,%rdi,4)' is not a valid base/index expression
| pulsecore/svolume_mmx.c:180: Error: `(%esi,%rdi,4)' is not a valid base/index expression
| pulsecore/svolume_mmx.c:210: Error: `(%esi,%rdi,4)' is not a valid base/index expression
| pulsecore/svolume_mmx.c:244: Error: `(%esi,%rdi,4)' is not a valid base/index expression
| pulsecore/svolume_mmx.c:245: Error: `8(%esi,%rdi,4)' is not a valid base/index expression
| make[3]: *** [libpulsecore_1.1_la-svolume_mmx.lo] Error 1

Originally these assembly lines were written for x86_64 ABI, now they
are also compatible with X32 ABI [3][4].

The patch was submitted to the OpenEmbedded-Core list [1][2].

[1] http://lists.linuxtogo.org/pipermail/openembedded-core/2011-December/014189.html
[2] http://git.yoctoproject.org/cgit.cgi/poky-contrib/commit/?h=nitin/x32&id=2d8eec54f755c51f2eff600390f5a4b3cc2a7662
[3] https://wiki.yoctoproject.org/wiki/X32_abi
[4] http://en.wikipedia.org/wiki/X32_ABI
2011-12-14 22:47:20 +05:30
Maarten Bosmans
dd9265ac78 Remove unnecessary #includes 2011-06-22 23:12:20 +01:00
Maarten Bosmans
b3721a12c5 Fixup #include directives according to Coding Style
Use #include "header.h" if functionality of header.h is implemented
and #include <header.h> if functionality of header.h is used.
2011-03-11 11:49:39 +00:00
Maarten Bosmans
ecf09f2cd6 Fix up according to Coding Style
Only whitespace changes in here
2011-03-11 11:49:35 +00:00
Edward Rudd
f51889c6f6 sconv_sse: Exclude SSE optimizations for Mac OS X
At least on 32bit compiles, there are not enough registers.
2011-02-22 21:33:44 +00:00
Lennart Poettering
71e066c873 simd: be more precise which SIMD optimizations we activate 2009-09-09 04:28:22 +02:00
Wim Taymans
26164ff051 sconv_sse: fix leftover counter 2009-09-02 19:42:17 +02:00
Lennart Poettering
ca2c0f22d8 sconv: quieten gcc a bit 2009-08-28 23:31:05 +02:00
Wim Taymans
beb180b7bc convert: add sse/sse2 s16 to float32ne conversions 2009-08-27 10:44:53 +02:00