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tests: Implement test code for RISC-V V sconv pa_sconv_s16le_from_float32ne

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banana_f3:
func: 52582 usec (avg: 525.82, min = 523, max = 565, stddev = 6.4271).
orig: 3568592 usec (avg: 35685.9, min = 35659, max = 35790, stddev = 20.7353).
100%: Checks: 1, Failures: 0, Errors: 0

k230:
func: 96150 usec (avg: 961.5, min = 919, max = 1275, stddev = 75.9664).
orig: 3961687 usec (avg: 39616.9, min = 38924, max = 40617, stddev = 484.576).
100%: Checks: 1, Failures: 0, Errors: 0
This commit is contained in:
sunyuechi 2024-09-13 22:26:01 +08:00 • committed by hleft
parent ad0580a22c
commit 790c94617b
1 changed files with 34 additions and 0 deletions
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34
src/tests/cpu-sconv-test.c
View file

@ -23,6 +23,7 @@
#include <pulsecore/cpu-arm.h>
#include <pulsecore/cpu-x86.h>
#include <pulsecore/cpu-riscv.h>
#include <pulsecore/random.h>
#include <pulsecore/macro.h>
#include <pulsecore/sconv.h>
@ -190,6 +191,35 @@ START_TEST (sconv_sse_test) {
END_TEST
#endif /* (defined (__i386__) || defined (__amd64__)) && defined (HAVE_SSE) */
#if HAVE_RVV
START_TEST (sconv_rvv_test) {
pa_cpu_riscv_flag_t flags = 0;
pa_convert_func_t orig_func, rvv_func;
pa_cpu_get_riscv_flags(&flags);
if (!(flags & PA_CPU_RISCV_V)) {
pa_log_info("RVV not supported. Skipping");
return;
}
orig_func = pa_get_convert_from_float32ne_function(PA_SAMPLE_S16LE);
pa_convert_func_init_rvv(PA_CPU_RISCV_V);
rvv_func = pa_get_convert_from_float32ne_function(PA_SAMPLE_S16LE);
pa_log_debug("Checking RVV sconv (float -> s16)");
run_conv_test_float_to_s16(rvv_func, orig_func, 0, true, false);
run_conv_test_float_to_s16(rvv_func, orig_func, 1, true, false);
run_conv_test_float_to_s16(rvv_func, orig_func, 2, true, false);
run_conv_test_float_to_s16(rvv_func, orig_func, 3, true, false);
run_conv_test_float_to_s16(rvv_func, orig_func, 4, true, false);
run_conv_test_float_to_s16(rvv_func, orig_func, 5, true, false);
run_conv_test_float_to_s16(rvv_func, orig_func, 6, true, false);
run_conv_test_float_to_s16(rvv_func, orig_func, 7, true, true);
}
END_TEST
#endif /* (defined () */
#if defined (__arm__) && defined (__linux__) && defined (HAVE_NEON)
START_TEST (sconv_neon_test) {
pa_cpu_arm_flag_t flags = 0;
@ -250,6 +280,10 @@ int main(int argc, char *argv[]) {
#endif
#if defined (__arm__) && defined (__linux__) && defined (HAVE_NEON)
tcase_add_test(tc, sconv_neon_test);
#endif
#if HAVE_RVV
tcase_set_timeout(tc, 0);
tcase_add_test(tc, sconv_rvv_test);
#endif
suite_add_tcase(s, tc);