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	bluetooth/sbc: Use __asm__ keyword
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					 4 changed files with 25 additions and 25 deletions
				
			
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			@ -41,7 +41,7 @@
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static void __attribute__((naked)) sbc_analyze_four_armv6()
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{
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	/* r0 = in, r1 = out, r2 = consts */
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	asm volatile (
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	__asm__ volatile (
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		"push   {r1, r4-r7, lr}\n"
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		"push   {r8-r11}\n"
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		"ldrd   r4,  r5,  [r0, #0]\n"
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			@ -112,7 +112,7 @@ static void __attribute__((naked)) sbc_analyze_four_armv6()
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static void __attribute__((naked)) sbc_analyze_eight_armv6()
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{
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	/* r0 = in, r1 = out, r2 = consts */
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	asm volatile (
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	__asm__ volatile (
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		"push   {r1, r4-r7, lr}\n"
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		"push   {r8-r11}\n"
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		"ldrd   r4,  r5,  [r0, #24]\n"
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			@ -42,7 +42,7 @@
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static inline void sbc_analyze_four_iwmmxt(const int16_t *in, int32_t *out,
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					const FIXED_T *consts)
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{
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	asm volatile (
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	__asm__ volatile (
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		"wldrd        wr0, [%0]\n"
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		"tbcstw       wr4, %2\n"
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		"wldrd        wr2, [%1]\n"
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			@ -115,7 +115,7 @@ static inline void sbc_analyze_four_iwmmxt(const int16_t *in, int32_t *out,
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static inline void sbc_analyze_eight_iwmmxt(const int16_t *in, int32_t *out,
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							const FIXED_T *consts)
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{
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	asm volatile (
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	__asm__ volatile (
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		"wldrd        wr0, [%0]\n"
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		"tbcstw       wr15, %2\n"
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		"wldrd        wr1, [%0, #8]\n"
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			@ -45,7 +45,7 @@ static inline void sbc_analyze_four_mmx(const int16_t *in, int32_t *out,
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		1 << (SBC_PROTO_FIXED4_SCALE - 1),
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		1 << (SBC_PROTO_FIXED4_SCALE - 1),
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	};
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	asm volatile (
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	__asm__ volatile (
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		"movq        (%0), %%mm0\n"
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		"movq       8(%0), %%mm1\n"
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		"pmaddwd     (%1), %%mm0\n"
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			@ -111,7 +111,7 @@ static inline void sbc_analyze_eight_mmx(const int16_t *in, int32_t *out,
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		1 << (SBC_PROTO_FIXED8_SCALE - 1),
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		1 << (SBC_PROTO_FIXED8_SCALE - 1),
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	};
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	asm volatile (
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	__asm__ volatile (
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		"movq        (%0), %%mm0\n"
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		"movq       8(%0), %%mm1\n"
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		"movq      16(%0), %%mm2\n"
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			@ -258,7 +258,7 @@ static inline void sbc_analyze_4b_4s_mmx(int16_t *x, int32_t *out,
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	out += out_stride;
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	sbc_analyze_four_mmx(x + 0, out, analysis_consts_fixed4_simd_even);
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	asm volatile ("emms\n");
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	__asm__ volatile ("emms\n");
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}
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static inline void sbc_analyze_4b_8s_mmx(int16_t *x, int32_t *out,
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			@ -273,7 +273,7 @@ static inline void sbc_analyze_4b_8s_mmx(int16_t *x, int32_t *out,
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	out += out_stride;
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	sbc_analyze_eight_mmx(x + 0, out, analysis_consts_fixed8_simd_even);
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	asm volatile ("emms\n");
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	__asm__ volatile ("emms\n");
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}
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static void sbc_calc_scalefactors_mmx(
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			@ -291,7 +291,7 @@ static void sbc_calc_scalefactors_mmx(
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		for (sb = 0; sb < subbands; sb += 2) {
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			blk = (blocks - 1) * (((char *) &sb_sample_f[1][0][0] -
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				(char *) &sb_sample_f[0][0][0]));
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			asm volatile (
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			__asm__ volatile (
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				"movq         (%4), %%mm0\n"
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			"1:\n"
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				"movq     (%1, %0), %%mm1\n"
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			@ -326,7 +326,7 @@ static void sbc_calc_scalefactors_mmx(
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			: "cc", "memory");
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		}
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	}
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	asm volatile ("emms\n");
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	__asm__ volatile ("emms\n");
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}
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static int check_mmx_support(void)
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			@ -335,7 +335,7 @@ static int check_mmx_support(void)
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	return 1; /* We assume that all 64-bit processors have MMX support */
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#else
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	int cpuid_feature_information;
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	asm volatile (
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	__asm__ volatile (
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		/* According to Intel manual, CPUID instruction is supported
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		 * if the value of ID bit (bit 21) in EFLAGS can be modified */
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		"pushf\n"
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			@ -44,7 +44,7 @@ static inline void _sbc_analyze_four_neon(const int16_t *in, int32_t *out,
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	/* TODO: merge even and odd cases (or even merge all four calls to this
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	 * function) in order to have only aligned reads from 'in' array
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	 * and reduce number of load instructions */
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	asm volatile (
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	__asm__ volatile (
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		"vld1.16    {d4, d5}, [%0, :64]!\n"
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		"vld1.16    {d8, d9}, [%1, :128]!\n"
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			@ -104,7 +104,7 @@ static inline void _sbc_analyze_eight_neon(const int16_t *in, int32_t *out,
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	/* TODO: merge even and odd cases (or even merge all four calls to this
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	 * function) in order to have only aligned reads from 'in' array
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	 * and reduce number of load instructions */
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	asm volatile (
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	__asm__ volatile (
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		"vld1.16    {d4, d5}, [%0, :64]!\n"
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		"vld1.16    {d8, d9}, [%1, :128]!\n"
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			@ -247,7 +247,7 @@ static void sbc_calc_scalefactors_neon(
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		for (sb = 0; sb < subbands; sb += 4) {
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			int blk = blocks;
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			int32_t *in = &sb_sample_f[0][ch][sb];
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			asm volatile (
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			__asm__ volatile (
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				"vmov.s32  q0, #0\n"
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				"vmov.s32  q1, %[c1]\n"
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				"vmov.s32  q14, #1\n"
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			@ -306,7 +306,7 @@ int sbc_calc_scalefactors_j_neon(
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	i = subbands;
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	asm volatile (
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	__asm__ volatile (
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		/*
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		 * constants: q13 = (31 - SCALE_OUT_BITS), q14 = 1
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		 * input:     q0  = ((1 << SCALE_OUT_BITS) + 1)
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			@ -561,7 +561,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_4s_neon_internal(
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	if (position < nsamples) {
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		int16_t *dst = &X[0][SBC_X_BUFFER_SIZE - 40];
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		int16_t *src = &X[0][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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			"vst1.16 {d0, d1, d2, d3}, [%[dst], :128]!\n"
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			"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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			@ -575,7 +575,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_4s_neon_internal(
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		if (nchannels > 1) {
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			dst = &X[1][SBC_X_BUFFER_SIZE - 40];
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			src = &X[1][position];
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			asm volatile (
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			__asm__ volatile (
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				"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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				"vst1.16 {d0, d1, d2, d3}, [%[dst], :128]!\n"
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				"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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			@ -594,7 +594,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_4s_neon_internal(
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		/* poor 'pcm' alignment */
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		int16_t *x = &X[0][position];
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		int16_t *y = &X[1][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.8  {d0, d1}, [%[perm], :128]\n"
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		"1:\n"
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			"sub     %[x], %[x], #16\n"
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			@ -628,7 +628,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_4s_neon_internal(
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		/* proper 'pcm' alignment */
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		int16_t *x = &X[0][position];
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		int16_t *y = &X[1][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.8  {d0, d1}, [%[perm], :128]\n"
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		"1:\n"
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			"sub     %[x], %[x], #16\n"
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			@ -658,7 +658,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_4s_neon_internal(
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			  "d20", "d21", "d22", "d23");
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	} else {
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		int16_t *x = &X[0][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.8  {d0, d1}, [%[perm], :128]\n"
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		"1:\n"
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			"sub     %[x], %[x], #16\n"
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			@ -703,7 +703,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_8s_neon_internal(
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	if (position < nsamples) {
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		int16_t *dst = &X[0][SBC_X_BUFFER_SIZE - 72];
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		int16_t *src = &X[0][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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			"vst1.16 {d0, d1, d2, d3}, [%[dst], :128]!\n"
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			"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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			@ -721,7 +721,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_8s_neon_internal(
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		if (nchannels > 1) {
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			dst = &X[1][SBC_X_BUFFER_SIZE - 72];
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			src = &X[1][position];
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			asm volatile (
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			__asm__ volatile (
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				"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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				"vst1.16 {d0, d1, d2, d3}, [%[dst], :128]!\n"
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				"vld1.16 {d0, d1, d2, d3}, [%[src], :128]!\n"
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			@ -744,7 +744,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_8s_neon_internal(
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		/* poor 'pcm' alignment */
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		int16_t *x = &X[0][position];
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		int16_t *y = &X[1][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.8  {d0, d1, d2, d3}, [%[perm], :128]\n"
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		"1:\n"
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			"sub     %[x], %[x], #32\n"
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			@ -782,7 +782,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_8s_neon_internal(
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		/* proper 'pcm' alignment */
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		int16_t *x = &X[0][position];
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		int16_t *y = &X[1][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.8  {d0, d1, d2, d3}, [%[perm], :128]\n"
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		"1:\n"
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			"sub     %[x], %[x], #32\n"
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			@ -816,7 +816,7 @@ static SBC_ALWAYS_INLINE int sbc_enc_process_input_8s_neon_internal(
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			  "d20", "d21", "d22", "d23");
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	} else {
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		int16_t *x = &X[0][position];
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		asm volatile (
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		__asm__ volatile (
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			"vld1.8  {d0, d1, d2, d3}, [%[perm], :128]\n"
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		"1:\n"
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			"sub     %[x], %[x], #32\n"
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