mirror of
https://gitlab.freedesktop.org/pipewire/pipewire.git
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124 lines
4.4 KiB
C
124 lines
4.4 KiB
C
/* Simple Plugin API
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*
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* Copyright © 2018 Wim Taymans
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef SPA_CPU_H
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#define SPA_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdarg.h>
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#include <spa/utils/defs.h>
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#include <spa/utils/hook.h>
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/**
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* The CPU features interface
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*/
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#define SPA_VERSION_CPU 0
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struct spa_cpu { struct spa_interface iface; };
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/* x86 specific */
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#define SPA_CPU_FLAG_MMX (1<<0) /**< standard MMX */
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#define SPA_CPU_FLAG_MMXEXT (1<<1) /**< SSE integer or AMD MMX ext */
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#define SPA_CPU_FLAG_3DNOW (1<<2) /**< AMD 3DNOW */
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#define SPA_CPU_FLAG_SSE (1<<3) /**< SSE */
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#define SPA_CPU_FLAG_SSE2 (1<<4) /**< SSE2 */
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#define SPA_CPU_FLAG_3DNOWEXT (1<<5) /**< AMD 3DNowExt */
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#define SPA_CPU_FLAG_SSE3 (1<<6) /**< Prescott SSE3 */
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#define SPA_CPU_FLAG_SSSE3 (1<<7) /**< Conroe SSSE3 */
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#define SPA_CPU_FLAG_SSE41 (1<<8) /**< Penryn SSE4.1 */
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#define SPA_CPU_FLAG_SSE42 (1<<9) /**< Nehalem SSE4.2 */
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#define SPA_CPU_FLAG_AESNI (1<<10) /**< Advanced Encryption Standard */
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#define SPA_CPU_FLAG_AVX (1<<11) /**< AVX */
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#define SPA_CPU_FLAG_XOP (1<<12) /**< Bulldozer XOP */
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#define SPA_CPU_FLAG_FMA4 (1<<13) /**< Bulldozer FMA4 */
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#define SPA_CPU_FLAG_CMOV (1<<14) /**< supports cmov */
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#define SPA_CPU_FLAG_AVX2 (1<<15) /**< AVX2 */
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#define SPA_CPU_FLAG_FMA3 (1<<16) /**< Haswell FMA3 */
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#define SPA_CPU_FLAG_BMI1 (1<<17) /**< Bit Manipulation Instruction Set 1 */
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#define SPA_CPU_FLAG_BMI2 (1<<18) /**< Bit Manipulation Instruction Set 2 */
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#define SPA_CPU_FLAG_AVX512 (1<<19) /**< AVX-512 */
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#define SPA_CPU_FLAG_SLOW_UNALIGNED (1<<20) /**< unaligned loads/stores are slow */
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/* PPC specific */
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#define SPA_CPU_FLAG_ALTIVEC (1<<0) /**< standard */
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#define SPA_CPU_FLAG_VSX (1<<1) /**< ISA 2.06 */
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#define SPA_CPU_FLAG_POWER8 (1<<2) /**< ISA 2.07 */
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/* ARM specific */
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#define SPA_CPU_FLAG_ARMV5TE (1 << 0)
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#define SPA_CPU_FLAG_ARMV6 (1 << 1)
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#define SPA_CPU_FLAG_ARMV6T2 (1 << 2)
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#define SPA_CPU_FLAG_VFP (1 << 3)
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#define SPA_CPU_FLAG_VFPV3 (1 << 4)
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#define SPA_CPU_FLAG_NEON (1 << 5)
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#define SPA_CPU_FLAG_ARMV8 (1 << 6)
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#define SPA_CPU_FORCE_AUTODETECT ((uint32_t)-1)
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/**
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* methods
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*/
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struct spa_cpu_methods {
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/** the version of the methods. This can be used to expand this
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structure in the future */
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#define SPA_VERSION_CPU_METHODS 0
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uint32_t version;
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/** get CPU flags */
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uint32_t (*get_flags) (void *object);
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/** force CPU flags, use SPA_CPU_FORCE_AUTODETECT to autodetect CPU flags */
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int (*force_flags) (void *object, uint32_t flags);
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/** get number of CPU cores */
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uint32_t (*get_count) (void *object);
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/** get maximum required alignment of data */
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uint32_t (*get_max_align) (void *object);
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};
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#define spa_cpu_method(o,method,version,...) \
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({ \
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int _res = -ENOTSUP; \
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struct spa_cpu *_c = o; \
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spa_interface_call_res(&_c->iface, \
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struct spa_cpu_methods, _res, \
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method, version, ##__VA_ARGS__); \
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_res; \
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})
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#define spa_cpu_get_flags(c) spa_cpu_method(c, get_flags, 0)
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#define spa_cpu_force_flags(c,f) spa_cpu_method(c, force_flags, 0, f)
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#define spa_cpu_get_count(c) spa_cpu_method(c, get_count, 0)
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#define spa_cpu_get_max_align(c) spa_cpu_method(c, get_max_align, 0)
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/** keys can be given when initializing the cpu handle */
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#define SPA_KEY_CPU_FORCE "cpu.force" /**< force cpu flags */
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#ifdef __cplusplus
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} /* extern "C" */
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#endif
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#endif /* SPA_CPU_H */
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