fmt-ops: add RVV optimizations for f32d_s16

This commit is contained in:
sunyuechi 2024-09-23 10:53:01 +08:00 committed by Wim Taymans
parent 852de6c35c
commit 8a8843ba20
5 changed files with 54 additions and 0 deletions

View file

@ -137,6 +137,7 @@ static void test_f32_s16(void)
if (cpu_flags & SPA_CPU_FLAG_RISCV_V) {
run_test("test_f32_s16", "rvv", true, true, conv_f32_to_s16_rvv);
run_test("test_f32d_s16d", "rvv", false, false, conv_f32d_to_s16d_rvv);
run_test("test_f32d_s16", "rvv", false, true, conv_f32d_to_s16_rvv);
}
#endif
run_test("test_f32_s16d", "c", true, false, conv_f32_to_s16d_c);

View file

@ -60,4 +60,53 @@ conv_f32d_to_s16d_rvv(struct convert *conv, void * SPA_RESTRICT dst[], const voi
f32_to_s16(conv, dst[i], src[i], n_samples);
}
}
static void
f32d_to_s16(void *data, void * SPA_RESTRICT dst, const void * SPA_RESTRICT src[],
uint32_t n_channels, uint32_t n_samples)
{
const float *s = src[0];
uint32_t stride = n_channels << 1;
asm __volatile__ (
".option arch, +v \n\t"
"li t0, 1191182336 \n\t"
"fmv.w.x fa5, t0 \n\t"
"1: \n\t"
"vsetvli t0, %[n_samples], e32, m8, ta, ma \n\t"
"vle32.v v8, (%[s]) \n\t"
"sub %[n_samples], %[n_samples], t0 \n\t"
"vfmul.vf v8, v8, fa5 \n\t"
"vsetvli zero, zero, e16, m4, ta, ma \n\t"
"vfncvt.x.f.w v8, v8 \n\t"
"slli t2, t0, 1 \n\t"
"vsse16.v v8, (%[dst]), %[stride] \n\t"
"add %[s], %[s], t2 \n\t"
"add %[s], %[s], t2 \n\t"
"mul t0, t0, %[stride] \n\t"
"add %[dst], %[dst], t0 \n\t"
"bnez %[n_samples], 1b \n\t"
: [n_samples] "+r" (n_samples),
[s] "+r" (s),
[dst] "+r" (dst)
: [stride] "r" (stride)
: "cc", "memory"
);
}
void
conv_f32d_to_s16_rvv(struct convert *conv, void * SPA_RESTRICT dst[], const void * SPA_RESTRICT src[],
uint32_t n_samples)
{
if (n_samples <= 4) {
conv_f32d_to_s16_c(conv, dst, src, n_samples);
return;
}
int16_t *d = dst[0];
uint32_t i = 0, n_channels = conv->n_channels;
for(i = 0; i < n_channels; i++)
f32d_to_s16(conv, &d[i], &src[i], n_channels, n_samples);
}
#endif

View file

@ -180,6 +180,7 @@ static struct conv_info conv_table[] =
#if defined (HAVE_RVV)
MAKE(F32, S16, 0, conv_f32_to_s16_rvv, SPA_CPU_FLAG_RISCV_V),
MAKE(F32P, S16P, 0, conv_f32d_to_s16d_rvv, SPA_CPU_FLAG_RISCV_V),
MAKE(F32P, S16, 0, conv_f32d_to_s16_rvv, SPA_CPU_FLAG_RISCV_V),
#endif
MAKE(F32, S16, 0, conv_f32_to_s16_c),

View file

@ -443,6 +443,7 @@ DEFINE_FUNCTION(f32d_to_s16, neon);
#if defined(HAVE_RVV)
DEFINE_FUNCTION(f32_to_s16, rvv);
DEFINE_FUNCTION(f32d_to_s16d, rvv);
DEFINE_FUNCTION(f32d_to_s16, rvv);
#endif
#if defined(HAVE_SSE2)
DEFINE_FUNCTION(s16_to_f32d_2, sse2);

View file

@ -234,6 +234,8 @@ static void test_f32_s16(void)
true, true, conv_f32_to_s16_rvv);
run_test("test_f32d_s16d_rvv", in, sizeof(in[0]), out, sizeof(out[0]), SPA_N_ELEMENTS(out),
false, false, conv_f32d_to_s16d_rvv);
run_test("test_f32d_s16_rvv", in, sizeof(in[0]), out, sizeof(out[0]), SPA_N_ELEMENTS(out),
false, true, conv_f32d_to_s16_rvv);
}
#endif
}