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fmt-ops: add RVV optimizations for s16_to_f32d
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5 changed files with 64 additions and 0 deletions
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@ -160,6 +160,11 @@ static void test_s16_f32(void)
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run_test("test_s16_f32d", "avx2", true, false, conv_s16_to_f32d_avx2);
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run_testc("test_s16_f32d_2", "avx2", true, false, conv_s16_to_f32d_2_avx2, 2);
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}
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#endif
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#if defined (HAVE_RVV)
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if (cpu_flags & SPA_CPU_FLAG_RISCV_V) {
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run_test("test_s16_f32d", "rvv", true, false, conv_s16_to_f32d_rvv);
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}
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#endif
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run_test("test_s16d_f32d", "c", false, false, conv_s16d_to_f32d_c);
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}
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@ -108,4 +108,53 @@ conv_f32d_to_s16_rvv(struct convert *conv, void * SPA_RESTRICT dst[], const void
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for(i = 0; i < n_channels; i++)
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f32d_to_s16(conv, &d[i], &src[i], n_channels, n_samples);
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}
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static void
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s16_to_f32d(void *data, void * SPA_RESTRICT dst[], const void * SPA_RESTRICT src,
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uint32_t n_channels, uint32_t n_samples)
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{
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float *d = dst[0];
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uint32_t stride = n_channels << 1;
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asm __volatile__ (
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".option arch, +v \n\t"
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"li t0, 939524096 \n\t"
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"fmv.w.x fa5, t0 \n\t"
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"1: \n\t"
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"vsetvli t0, %[n_samples], e16, m4, ta, ma \n\t"
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"vlse16.v v8, (%[src]), %[stride] \n\t"
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"sub %[n_samples], %[n_samples], t0 \n\t"
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"vfwcvt.f.x.v v16, v8 \n\t"
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"vsetvli zero, zero, e32, m8, ta, ma \n\t"
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"mul t4, t0, %[stride] \n\t"
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"vfmul.vf v8, v16, fa5 \n\t"
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"slli t3, t0, 2 \n\t"
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"vse32.v v8, (%[d]) \n\t"
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"add %[src], %[src], t4 \n\t"
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"add %[d], %[d], t3 \n\t"
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"bnez %[n_samples], 1b \n\t"
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: [n_samples] "+r" (n_samples),
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[src] "+r" (src),
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[d] "+r" (d)
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: [stride] "r" (stride)
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: "cc", "memory"
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);
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}
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void
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conv_s16_to_f32d_rvv(struct convert *conv, void * SPA_RESTRICT dst[], const void * SPA_RESTRICT src[],
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uint32_t n_samples)
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{
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if (n_samples <= 4) {
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conv_s16_to_f32d_c(conv, dst, src, n_samples);
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return;
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}
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const int16_t *s = src[0];
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uint32_t i = 0, n_channels = conv->n_channels;
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for(i = 0; i < n_channels; i++)
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s16_to_f32d(conv, &dst[i], &s[i], n_channels, n_samples);
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}
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#endif
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@ -68,6 +68,9 @@ static struct conv_info conv_table[] =
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#if defined (HAVE_SSE2)
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MAKE(S16, F32P, 2, conv_s16_to_f32d_2_sse2, SPA_CPU_FLAG_SSE2),
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MAKE(S16, F32P, 0, conv_s16_to_f32d_sse2, SPA_CPU_FLAG_SSE2),
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#endif
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#if defined (HAVE_RVV)
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MAKE(S16, F32P, 0, conv_s16_to_f32d_rvv, SPA_CPU_FLAG_RISCV_V),
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#endif
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MAKE(S16, F32P, 0, conv_s16_to_f32d_c),
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MAKE(S16P, F32, 0, conv_s16d_to_f32_c),
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@ -444,6 +444,7 @@ DEFINE_FUNCTION(f32d_to_s16, neon);
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DEFINE_FUNCTION(f32_to_s16, rvv);
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DEFINE_FUNCTION(f32d_to_s16d, rvv);
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DEFINE_FUNCTION(f32d_to_s16, rvv);
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DEFINE_FUNCTION(s16_to_f32d, rvv);
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#endif
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#if defined(HAVE_SSE2)
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DEFINE_FUNCTION(s16_to_f32d_2, sse2);
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@ -271,6 +271,12 @@ static void test_s16_f32(void)
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true, false, conv_s16_to_f32d_neon);
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}
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#endif
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#if defined(HAVE_RVV)
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if (cpu_flags & SPA_CPU_FLAG_RISCV_V) {
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run_test("test_s16_f32d_rvv", in, sizeof(in[0]), out, sizeof(out[0]), SPA_N_ELEMENTS(out),
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true, false, conv_s16_to_f32d_rvv);
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}
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#endif
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}
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static void test_f32_u32(void)
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