Channel mixer: Remove channelmix_f32_2_4_sse

It does not have PSD upmixing implemented and does not allow to disable
the simple upmixing algorithm either.

Fixes #2438.
This commit is contained in:
Ole Salscheider 2022-06-11 23:53:59 +02:00 committed by Wim Taymans
parent a1d4b41c34
commit 354a04c91d
3 changed files with 0 additions and 71 deletions

View file

@ -70,73 +70,6 @@ void channelmix_copy_sse(struct channelmix *mix, void * SPA_RESTRICT dst[],
}
}
void
channelmix_f32_2_4_sse(struct channelmix *mix, void * SPA_RESTRICT dst[],
const void * SPA_RESTRICT src[], uint32_t n_samples)
{
uint32_t i, n, unrolled, n_dst = mix->dst_chan;
float **d = (float **)dst;
const float **s = (const float **)src;
const float m00 = mix->matrix[0][0];
const float m11 = mix->matrix[1][1];
__m128 in;
const float *sFL = s[0], *sFR = s[1];
float *dFL = d[0], *dFR = d[1], *dRL = d[2], *dRR = d[3];
if (SPA_IS_ALIGNED(sFL, 16) &&
SPA_IS_ALIGNED(sFR, 16) &&
SPA_IS_ALIGNED(dFL, 16) &&
SPA_IS_ALIGNED(dFR, 16) &&
SPA_IS_ALIGNED(dRL, 16) &&
SPA_IS_ALIGNED(dRR, 16))
unrolled = n_samples & ~3;
else
unrolled = 0;
if (SPA_FLAG_IS_SET(mix->flags, CHANNELMIX_FLAG_ZERO)) {
for (i = 0; i < n_dst; i++)
memset(d[i], 0, n_samples * sizeof(float));
}
else if (m00 == 1.0f && m11 == 1.0f) {
for(n = 0; n < unrolled; n += 4) {
in = _mm_load_ps(&sFL[n]);
_mm_store_ps(&dFL[n], in);
_mm_store_ps(&dRL[n], in);
in = _mm_load_ps(&sFR[n]);
_mm_store_ps(&dFR[n], in);
_mm_store_ps(&dRR[n], in);
}
for(; n < n_samples; n++) {
in = _mm_load_ss(&sFL[n]);
_mm_store_ss(&dFL[n], in);
_mm_store_ss(&dRL[n], in);
in = _mm_load_ss(&sFR[n]);
_mm_store_ss(&dFR[n], in);
_mm_store_ss(&dRR[n], in);
}
}
else {
const __m128 v0 = _mm_set1_ps(m00);
const __m128 v1 = _mm_set1_ps(m11);
for(n = 0; n < unrolled; n += 4) {
in = _mm_mul_ps(_mm_load_ps(&sFL[n]), v0);
_mm_store_ps(&dFL[n], in);
_mm_store_ps(&dRL[n], in);
in = _mm_mul_ps(_mm_load_ps(&sFR[n]), v1);
_mm_store_ps(&dFR[n], in);
_mm_store_ps(&dRR[n], in);
}
for(; n < n_samples; n++) {
in = _mm_mul_ss(_mm_load_ss(&sFL[n]), v0);
_mm_store_ss(&dFL[n], in);
_mm_store_ss(&dRL[n], in);
in = _mm_mul_ss(_mm_load_ss(&sFR[n]), v1);
_mm_store_ss(&dFR[n], in);
_mm_store_ss(&dRR[n], in);
}
}
}
/* FL+FR+FC+LFE+SL+SR -> FL+FR */
void
channelmix_f32_5p1_2_sse(struct channelmix *mix, void * SPA_RESTRICT dst[],

View file

@ -79,9 +79,6 @@ static const struct channelmix_info {
{ 2, MASK_STEREO, 1, MASK_MONO, channelmix_f32_2_1_c, 0, "f32_2_1_c" },
{ 4, MASK_QUAD, 1, MASK_MONO, channelmix_f32_4_1_c, 0, "f32_4_1_c" },
{ 4, MASK_3_1, 1, MASK_MONO, channelmix_f32_4_1_c, 0, "f32_4_1_c" },
#if defined (HAVE_SSE)
{ 2, MASK_STEREO, 4, MASK_QUAD, channelmix_f32_2_4_sse, SPA_CPU_FLAG_SSE, "f32_2_4_sse" },
#endif
{ 2, MASK_STEREO, 4, MASK_QUAD, channelmix_f32_2_4_c, 0, "f32_2_4_c" },
{ 2, MASK_STEREO, 4, MASK_3_1, channelmix_f32_2_3p1_c, 0, "f32_2_3p1_c" },
{ 2, MASK_STEREO, 6, MASK_5_1, channelmix_f32_2_5p1_c, 0, "f32_2_5p1_c" },

View file

@ -151,7 +151,6 @@ DEFINE_FUNCTION(f32_7p1_4, c);
#if defined (HAVE_SSE)
DEFINE_FUNCTION(copy, sse);
DEFINE_FUNCTION(f32_2_4, sse);
DEFINE_FUNCTION(f32_5p1_2, sse);
DEFINE_FUNCTION(f32_5p1_3p1, sse);
DEFINE_FUNCTION(f32_5p1_4, sse);