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pcm: Define refine mask bits explicitly (and fix missing DSD support)

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Instead of the expanded bit numbers like 0x81ffffff, list up the all
supported PCM bits explicitly for refine_masks[] in pcm_params.c.
This makes easier to update any additional formats or other
parameters, and easier to spot out missing ones.

Actually the GSM and DSD formats were missing; with this commit, they
are supported properly now.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Takashi Iwai 2018-06-28 07:59:46 +02:00
parent 4bf0e481e6
commit 9fc248925b
1 changed files with 67 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

70
src/pcm/pcm_params.c
View file

@ -1936,16 +1936,80 @@ static const snd_pcm_hw_rule_t refine_rules[] = {
};
#define RULES (sizeof(refine_rules) / sizeof(refine_rules[0]))
#define PCM_BIT(x) \
(1U << ((x) < 32 ? (x) : ((x) - 32)))
static const snd_mask_t refine_masks[SND_PCM_HW_PARAM_LAST_MASK - SND_PCM_HW_PARAM_FIRST_MASK + 1] = {
[SND_PCM_HW_PARAM_ACCESS - SND_PCM_HW_PARAM_FIRST_MASK] = {
.bits = { 0x1f },
.bits = {
PCM_BIT(SNDRV_PCM_ACCESS_MMAP_INTERLEAVED) |
PCM_BIT(SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED) |
PCM_BIT(SNDRV_PCM_ACCESS_MMAP_COMPLEX) |
PCM_BIT(SNDRV_PCM_ACCESS_RW_INTERLEAVED) |
PCM_BIT(SNDRV_PCM_ACCESS_RW_NONINTERLEAVED)
},
},
[SND_PCM_HW_PARAM_FORMAT - SND_PCM_HW_PARAM_FIRST_MASK] = {
.bits = { 0x81ffffff, 0xfff},
.bits = {
/* first 32bits */
PCM_BIT(SNDRV_PCM_FORMAT_S8) |
PCM_BIT(SNDRV_PCM_FORMAT_U8) |
PCM_BIT(SNDRV_PCM_FORMAT_S16_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_S16_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_U16_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_U16_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_S24_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_S24_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_U24_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_U24_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_S32_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_S32_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_U32_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_U32_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_FLOAT_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_FLOAT_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_FLOAT64_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_FLOAT64_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_IEC958_SUBFRAME) |
PCM_BIT(SNDRV_PCM_FORMAT_IEC958_SUBFRAME) |
PCM_BIT(SNDRV_PCM_FORMAT_MU_LAW) |
PCM_BIT(SNDRV_PCM_FORMAT_A_LAW) |
PCM_BIT(SNDRV_PCM_FORMAT_IMA_ADPCM) |
PCM_BIT(SNDRV_PCM_FORMAT_MPEG) |
PCM_BIT(SNDRV_PCM_FORMAT_GSM) |
PCM_BIT(SNDRV_PCM_FORMAT_S20_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_S20_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_U20_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_U20_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_SPECIAL),
/* second 32bits */
PCM_BIT(SNDRV_PCM_FORMAT_S24_3LE) |
PCM_BIT(SNDRV_PCM_FORMAT_S24_3BE) |
PCM_BIT(SNDRV_PCM_FORMAT_U24_3LE) |
PCM_BIT(SNDRV_PCM_FORMAT_U24_3BE) |
PCM_BIT(SNDRV_PCM_FORMAT_S20_3LE) |
PCM_BIT(SNDRV_PCM_FORMAT_S20_3BE) |
PCM_BIT(SNDRV_PCM_FORMAT_U20_3LE) |
PCM_BIT(SNDRV_PCM_FORMAT_U20_3BE) |
PCM_BIT(SNDRV_PCM_FORMAT_S18_3LE) |
PCM_BIT(SNDRV_PCM_FORMAT_S18_3BE) |
PCM_BIT(SNDRV_PCM_FORMAT_U18_3LE) |
PCM_BIT(SNDRV_PCM_FORMAT_U18_3BE) |
PCM_BIT(SNDRV_PCM_FORMAT_G723_24) |
PCM_BIT(SNDRV_PCM_FORMAT_G723_24) |
PCM_BIT(SNDRV_PCM_FORMAT_G723_40) |
PCM_BIT(SNDRV_PCM_FORMAT_G723_40) |
PCM_BIT(SNDRV_PCM_FORMAT_DSD_U8) |
PCM_BIT(SNDRV_PCM_FORMAT_DSD_U16_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_DSD_U32_LE) |
PCM_BIT(SNDRV_PCM_FORMAT_DSD_U16_BE) |
PCM_BIT(SNDRV_PCM_FORMAT_DSD_U32_BE)
},
},
[SND_PCM_HW_PARAM_SUBFORMAT - SND_PCM_HW_PARAM_FIRST_MASK] = {
.bits = { 0x1 },
.bits = {
PCM_BIT(SNDRV_PCM_SUBFORMAT_STD)
},
},
};