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https://github.com/alsa-project/alsa-lib.git
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include/sound: sync with the kernel v5.4
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
This commit is contained in:
Jaroslav Kysela
parent
1a4b362115
commit
0aece285a7
11 changed files with 368 additions and 175 deletions
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@ -1,6 +1,4 @@
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#ifndef __SOUND_EMU10K1_H
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#define __SOUND_EMU10K1_H
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/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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/*
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* Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
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* Creative Labs, Inc.
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@ -19,11 +17,14 @@
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef _UAPI__SOUND_EMU10K1_H
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#define _UAPI__SOUND_EMU10K1_H
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#include <stdint.h>
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#include <linux/types.h>
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#include <sound/asound.h>
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/*
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* ---- FX8010 ----
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@ -34,6 +35,14 @@
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#define EMU10K1_FX8010_PCM_COUNT 8
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/*
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* Following definition is copied from linux/types.h to support compiling
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* this header file in userspace since they are not generally available for
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* uapi headers.
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*/
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#define __EMU10K1_DECLARE_BITMAP(name,bits) \
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unsigned long name[(bits) / (sizeof(unsigned long) * 8)]
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/* instruction set */
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#define iMAC0 0x00 /* R = A + (X * Y >> 31) ; saturation */
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#define iMAC1 0x01 /* R = A + (-X * Y >> 31) ; saturation */
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@ -55,7 +64,10 @@
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/* GPRs */
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#define FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x0f */
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#define EXTIN(x) (0x10 + (x)) /* x = 0x00 - 0x0f */
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#define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f */
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#define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f physical outs -> FXWC low 16 bits */
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#define FXBUS2(x) (0x30 + (x)) /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bits */
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/* NB: 0x31 and 0x32 are shared with Center/LFE on SB live 5.1 */
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#define C_00000000 0x40
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#define C_00000001 0x41
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#define C_00000002 0x42
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@ -90,9 +102,22 @@
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#define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
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#define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
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#define A_FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x3f? */
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#define A_EXTIN(x) (0x40 + (x)) /* x = 0x00 - 0x1f? */
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#define A_EXTOUT(x) (0x60 + (x)) /* x = 0x00 - 0x1f? */
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#define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
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#define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
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#define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
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#define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
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#define A_ITRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
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#define A_ETRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
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#define A_FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x3f FX buses */
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#define A_EXTIN(x) (0x40 + (x)) /* x = 0x00 - 0x0f physical ins */
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#define A_P16VIN(x) (0x50 + (x)) /* x = 0x00 - 0x0f p16v ins (A2 only) "EMU32 inputs" */
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#define A_EXTOUT(x) (0x60 + (x)) /* x = 0x00 - 0x1f physical outs -> A_FXWC1 0x79-7f unknown */
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#define A_FXBUS2(x) (0x80 + (x)) /* x = 0x00 - 0x1f extra outs used for EFX capture -> A_FXWC2 */
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#define A_EMU32OUTH(x) (0xa0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_10 - _1F" - ??? */
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#define A_EMU32OUTL(x) (0xb0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_1 - _F" - ??? */
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#define A3_EMU32IN(x) (0x160 + (x)) /* x = 0x00 - 0x3f "EMU32_IN_00 - _3F" - Only when .device = 0x0008 */
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#define A3_EMU32OUT(x) (0x1E0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_00 - _3F" - Only when .device = 0x0008 */
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#define A_GPR(x) (A_FXGPREGBASE + (x))
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/* cc_reg constants */
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@ -242,14 +267,14 @@
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#define TANKMEMADDRREG_READ 0x00100000 /* Read from tank memory */
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#endif
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typedef struct {
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struct snd_emu10k1_fx8010_info {
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unsigned int internal_tram_size; /* in samples */
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unsigned int external_tram_size; /* in samples */
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char fxbus_names[16][32]; /* names of FXBUSes */
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char extin_names[16][32]; /* names of external inputs */
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char extout_names[32][32]; /* names of external outputs */
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unsigned int gpr_controls; /* count of GPR controls */
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} emu10k1_fx8010_info_t;
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};
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#define EMU10K1_GPR_TRANSLATION_NONE 0
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#define EMU10K1_GPR_TRANSLATION_TABLE100 1
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@ -257,22 +282,8 @@ typedef struct {
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#define EMU10K1_GPR_TRANSLATION_TREBLE 3
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#define EMU10K1_GPR_TRANSLATION_ONOFF 4
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enum emu10k1_ctl_elem_iface {
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EMU10K1_CTL_ELEM_IFACE_MIXER = 2, /* virtual mixer device */
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EMU10K1_CTL_ELEM_IFACE_PCM = 3, /* PCM device */
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};
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typedef struct {
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unsigned int pad; /* don't use */
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int iface; /* interface identifier */
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unsigned int device; /* device/client number */
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unsigned int subdevice; /* subdevice (substream) number */
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unsigned char name[44]; /* ASCII name of item */
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unsigned int index; /* index of item */
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} emu10k1_ctl_elem_id_t;
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typedef struct {
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emu10k1_ctl_elem_id_t id; /* full control ID definition */
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struct snd_emu10k1_fx8010_control_gpr {
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struct snd_ctl_elem_id id; /* full control ID definition */
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unsigned int vcount; /* visible count */
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unsigned int count; /* count of GPR (1..16) */
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unsigned short gpr[32]; /* GPR number(s) */
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@ -280,41 +291,53 @@ typedef struct {
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unsigned int min; /* minimum range */
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unsigned int max; /* maximum range */
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unsigned int translation; /* translation type (EMU10K1_GPR_TRANSLATION*) */
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unsigned int *tlv;
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} emu10k1_fx8010_control_gpr_t;
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const unsigned int *tlv;
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};
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typedef struct {
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/* old ABI without TLV support */
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struct snd_emu10k1_fx8010_control_old_gpr {
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struct snd_ctl_elem_id id;
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unsigned int vcount;
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unsigned int count;
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unsigned short gpr[32];
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unsigned int value[32];
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unsigned int min;
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unsigned int max;
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unsigned int translation;
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};
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struct snd_emu10k1_fx8010_code {
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char name[128];
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unsigned long gpr_valid[0x200/(sizeof(unsigned long)*8)]; /* bitmask of valid initializers */
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uint32_t *gpr_map; /* initializers */
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__EMU10K1_DECLARE_BITMAP(gpr_valid, 0x200); /* bitmask of valid initializers */
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__u32 __user *gpr_map; /* initializers */
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unsigned int gpr_add_control_count; /* count of GPR controls to add/replace */
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emu10k1_fx8010_control_gpr_t *gpr_add_controls; /* GPR controls to add/replace */
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struct snd_emu10k1_fx8010_control_gpr __user *gpr_add_controls; /* GPR controls to add/replace */
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unsigned int gpr_del_control_count; /* count of GPR controls to remove */
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emu10k1_ctl_elem_id_t *gpr_del_controls; /* IDs of GPR controls to remove */
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struct snd_ctl_elem_id __user *gpr_del_controls; /* IDs of GPR controls to remove */
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unsigned int gpr_list_control_count; /* count of GPR controls to list */
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unsigned int gpr_list_control_total; /* total count of GPR controls */
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emu10k1_fx8010_control_gpr_t *gpr_list_controls; /* listed GPR controls */
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struct snd_emu10k1_fx8010_control_gpr __user *gpr_list_controls; /* listed GPR controls */
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unsigned long tram_valid[0x100/(sizeof(unsigned long)*8)]; /* bitmask of valid initializers */
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uint32_t *tram_data_map; /* data initializers */
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uint32_t *tram_addr_map; /* map initializers */
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__EMU10K1_DECLARE_BITMAP(tram_valid, 0x100); /* bitmask of valid initializers */
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__u32 __user *tram_data_map; /* data initializers */
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__u32 __user *tram_addr_map; /* map initializers */
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unsigned long code_valid[1024/(sizeof(unsigned long)*8)]; /* bitmask of valid instructions */
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uint32_t *code; /* one instruction - 64 bits */
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} emu10k1_fx8010_code_t;
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__EMU10K1_DECLARE_BITMAP(code_valid, 1024); /* bitmask of valid instructions */
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__u32 __user *code; /* one instruction - 64 bits */
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};
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typedef struct {
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struct snd_emu10k1_fx8010_tram {
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unsigned int address; /* 31.bit == 1 -> external TRAM */
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unsigned int size; /* size in samples (4 bytes) */
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unsigned int *samples; /* pointer to samples (20-bit) */
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/* NULL->clear memory */
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} emu10k1_fx8010_tram_t;
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};
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typedef struct {
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struct snd_emu10k1_fx8010_pcm_rec {
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unsigned int substream; /* substream number */
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unsigned int res1; /* reserved */
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unsigned int channels; /* 16-bit channels count, zero = remove this substream */
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@ -329,16 +352,18 @@ typedef struct {
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unsigned char pad; /* reserved */
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unsigned char etram[32]; /* external TRAM address & data (one per channel) */
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unsigned int res2; /* reserved */
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} emu10k1_fx8010_pcm_t;
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};
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#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, emu10k1_fx8010_info_t)
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#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, emu10k1_fx8010_code_t)
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#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, emu10k1_fx8010_code_t)
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#define SNDRV_EMU10K1_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
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#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, struct snd_emu10k1_fx8010_info)
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#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, struct snd_emu10k1_fx8010_code)
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#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, struct snd_emu10k1_fx8010_code)
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#define SNDRV_EMU10K1_IOCTL_TRAM_SETUP _IOW ('H', 0x20, int)
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#define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW ('H', 0x21, emu10k1_fx8010_tram_t)
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#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, emu10k1_fx8010_tram_t)
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#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, emu10k1_fx8010_pcm_t)
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#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, emu10k1_fx8010_pcm_t)
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#define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW ('H', 0x21, struct snd_emu10k1_fx8010_tram)
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#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, struct snd_emu10k1_fx8010_tram)
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#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, struct snd_emu10k1_fx8010_pcm_rec)
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#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, struct snd_emu10k1_fx8010_pcm_rec)
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#define SNDRV_EMU10K1_IOCTL_PVERSION _IOR ('H', 0x40, int)
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#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80)
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#define SNDRV_EMU10K1_IOCTL_CONTINUE _IO ('H', 0x81)
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@ -346,4 +371,11 @@ typedef struct {
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#define SNDRV_EMU10K1_IOCTL_SINGLE_STEP _IOW ('H', 0x83, int)
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#define SNDRV_EMU10K1_IOCTL_DBG_READ _IOR ('H', 0x84, int)
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#endif /* __SOUND_EMU10K1_H */
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/* typedefs for compatibility to user-space */
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typedef struct snd_emu10k1_fx8010_info emu10k1_fx8010_info_t;
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typedef struct snd_emu10k1_fx8010_control_gpr emu10k1_fx8010_control_gpr_t;
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typedef struct snd_emu10k1_fx8010_code emu10k1_fx8010_code_t;
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typedef struct snd_emu10k1_fx8010_tram emu10k1_fx8010_tram_t;
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typedef struct snd_emu10k1_fx8010_pcm_rec emu10k1_fx8010_pcm_t;
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#endif /* _UAPI__SOUND_EMU10K1_H */
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